DocumentCode :
3217780
Title :
A 4-Mbit trench DRAM technology functional test manufacturing/characterization strategy
Author :
Long, Christopher W. ; Voldman, Steven H.
Author_Institution :
IBM, Essex Junction, VT, USA
fYear :
1990
fDate :
21-23 May 1990
Firstpage :
74
Lastpage :
84
Abstract :
The authors discuss a 4-Mb substrate-plate-trench (SPT) DRAM (dynamic random access memory) technology applying an innovative manufacturing test strategy using the technology product chip, an addressable diagnostic monitor (ADM), and trench DC macroarray test structures. This manufacturing functional test strategy is effective in achieving process optimization, defect characterization, and high retention yield in a DRAM trench technology. Examples of the strategy´s application in various situations and at different development stages are shown
Keywords :
VLSI; integrated circuit manufacture; integrated circuit testing; integrated memory circuits; random-access storage; 4 Mbit; DRAM trench technology; ULSI; VLSI; addressable diagnostic monitor; characterisation strategy; defect characterization; dynamic random access memory; high retention yield; manufacturing functional test strategy; manufacturing test strategy; process optimization; substrate-plate-trench; trench DC macroarray test structures; trench DRAM technology; CMOS technology; Capacitance; Capacitors; Circuit testing; Manufacturing processes; Monitoring; Random access memory; Semiconductor device manufacture; Semiconductor device testing; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing Science Symposium, 1990. ISMSS 1990., IEEE/SEMI International
Conference_Location :
Burlingame, CA
Type :
conf
DOI :
10.1109/ISMSS.1990.66113
Filename :
66113
Link To Document :
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