DocumentCode
3217788
Title
Simple iterative matching for input and output buffered switch with multiple switching planes
Author
Han, Man-Soo ; Jeon, Yong-Il ; Lee, Woo-Seob ; Park, Kwon-Cheol
Author_Institution
Adv. Switching Technol. Dept., Electron. & Telecommun. Res. Inst., Taejon, South Korea
fYear
2001
fDate
2001
Firstpage
163
Lastpage
167
Abstract
We present a simple iterative matching for an input and output buffered switch with multiple switching planes. The suggested algorithm is based on iSLIP and consists of request, grant and accept steps. The pointer update scheme of iSLIP is simplified in the suggested algorithm to enhance a match efficiency and a service fairness. In addition, we show a switch performance is improved when the suggested algorithm is used with an occupancy level of a queue. Using computer simulation under Bernoulli traffic, we show the suggested algorithm is better than iSLIP for cell scheduling of input and output buffered switches
Keywords
buffer storage; iterative methods; queueing theory; scheduling; telecommunication switching; telecommunication traffic; Bernoulli traffic; accept steps; cell scheduling; grant step; iSLIP algorithm; input buffered switch; multiple switching planes; output buffered switch; pointer update scheme; queue occupancy level; request step; simple iterative matching; Computer simulation; Impedance matching; Iterative algorithms; Processor scheduling; Round robin; Scheduling algorithm; Switches; Switching systems; Telecommunication switching; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
ATM (ICATM 2001) and High Speed Intelligent Internet Symposium, 2001. Joint 4th IEEE International Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-7093-7
Type
conf
DOI
10.1109/ICATM.2001.932078
Filename
932078
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