Title :
The Process of Higher Level Design
Author :
Sanguinetti, John
Author_Institution :
Forte Design Syst., San Jose, CA
Abstract :
Summary form only given. Design using stepwise refinement is a common paradigm which has been in use for decades. In a programming context, it was described by Niklaus Wirth in an influential 1971 paper. Stepwise refinement is really just a process of code transformations to produce an implementation with the desired characteristics. In a hardware context, the design starts with an executable specification, usually a C program. Typical transformation steps include the elaboration of hierarchy, memory architecture, coarse-grain parallelization, and fine-grain parallelization. The end result is an executable representation of the design which can be automatically synthesized into hardware with the desired performance characteristics. As time goes by, synthesis tools get smarter and automatically do many of the common transformations, but in general a synthesis tool cannot fix a bad algorithm. The stepwise refinement process can be characterized as doing hardware design at a higher level than the more typical RT level. The tutorial will cover the common steps to go from a C algorithm to a SystemC representation which can be synthesized into a desirable hardware implementation
Keywords :
C language; electronic design automation; high level synthesis; C algorithm; SystemC representation; coarse grain parallelization; code transformations; fine grain parallelization; hardware design; high level design; memory architecture; stepwise refinement; Computational modeling; Computer architecture; Hardware design languages; Memory architecture; Performance analysis; Refining;
Conference_Titel :
Integrated Circuits and Systems Design, 18th Symposium on
Conference_Location :
Florianopolis
Print_ISBN :
1-59593-174-0
DOI :
10.1109/SBCCI.2005.4286818