• DocumentCode
    3218831
  • Title

    High Level Design: The Future is Now

  • Author

    Sanguinetti, John

  • Author_Institution
    Forte Design Syst., San Jose, CA
  • fYear
    2005
  • fDate
    4-7 Sept. 2005
  • Firstpage
    5
  • Lastpage
    5
  • Abstract
    Summary form only given. High-level design can generally be described as the process of designing hardware starting from an executable specification and proceeding to increasingly detailed representations. Until recently, design automation tools have not been sufficient to allow a continuous sequence of small transformations from algorithmic specification to acceptable implementation. As high-level synthesis tools are maturing to the point where high-level design is practical, the ramifications are becoming apparent. Architectural exploration, RTL that is correct by construction and verification efficiency has all been widely anticipated, though perhaps not fully appreciated. Other attributes of using high-level synthesis are only now becoming apparent, including the value of global optimization, the effects of regular RTL on downstream design tools, and the effects on IP reuse. As maturing high-level synthesis increasingly enables high-level design, these effects will have a profound influence on the resulting hardware, the design tool chain, and the design process
  • Keywords
    electronic design automation; high level synthesis; design automation; global optimization; hardware design; high level design; Computational modeling; Computer architecture; Design automation; Design optimization; Hardware design languages; High level synthesis; Performance analysis; Process design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits and Systems Design, 18th Symposium on
  • Conference_Location
    Florianopolis
  • Print_ISBN
    1-59593-174-0
  • Type

    conf

  • DOI
    10.1109/SBCCI.2005.4286820
  • Filename
    4286820