Title :
Energy Efficient NoC Design
Author_Institution :
Universita di Bologna
Abstract :
Summary form only given. Energy efficiency is a key concern in the design of advanced SoC platforms. In this talk we explore the delicate interplay between on-chip communication and power consumption. We move from state-of-the art communication fabrics (shared buses, crossbars), to advanced, "revolutionary" network-on-chip interconnects. We touch upon several energy optimization and management problems emerging in the design and tuning of on-chip interconnects. Our analysis show that energy-efficient on-chip communication is one of the cornerstones of system-level energy optimization
Keywords :
integrated circuit design; integrated circuit interconnections; network-on-chip; SoC platform; communication fabrics; energy efficiency; energy-efficient on-chip communication; management problem; network-on-chip interconnect; on-chip interconnect; system-level energy optimization; system-on-chip; Art; Design optimization; Energy consumption; Energy efficiency; Energy management; Fabrics; Network-on-a-chip; Power system interconnection; Power system management; System-on-a-chip;
Conference_Titel :
Integrated Circuits and Systems Design, 18th Symposium on
Conference_Location :
Florianopolis
Print_ISBN :
1-59593-174-0
DOI :
10.1109/SBCCI.2005.4286821
