DocumentCode
3220470
Title
ATREX: Design for testability system for Mega Gate LSIs
Author
Emori, Michiaki ; Kumagai, Junko ; Itaya, Koichi ; Aikyo, Takashi ; Anan, Tomoko ; Niimi, Junichi
Author_Institution
Fujitsu Labs. Ltd., Kawasaki, Japan
fYear
1997
fDate
17-19 Nov 1997
Firstpage
126
Lastpage
129
Abstract
We propose a Design for Testability System for Mega Gate LSIs. This system meets various demands of designers, because this system has high flexibility. We show the flexibility by introducing some examples of circuit insertion which is supported by the system
Keywords
automatic test software; automatic testing; design for testability; integrated logic circuits; large scale integration; logic design; logic gates; logic testing; ATREX; Mega Gate LSI; circuit insertion; design for testability; Circuit testing; Clocks; Design for testability; Design methodology; Flexible printed circuits; Large scale integration; Libraries; Logic circuits; Logic design; Pins;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian
Conference_Location
Akita
ISSN
1081-7735
Print_ISBN
0-8186-8209-4
Type
conf
DOI
10.1109/ATS.1997.643947
Filename
643947
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