Title :
An SCMOS digital cell family for mixed-signal applications
Author :
Tridandapani, Pamela ; Anantharaman, Seshadri ; Boecker, Charles ; Brus, Joseph ; Dirks, Kyle ; Jungels, Nicholas ; Kulkami, M. ; Shearer, Robert ; Tam, Chi ; Black, William C., Jr.
Author_Institution :
Iowa State Univ., Ames, IA, USA
Abstract :
A CMOS digital cell family has been developed for use in VLSI mixed-signal applications. This cell family has been designed with MOSIS scaleable CMOS rules for use with triple-level metal processes and consists of cells 90 λ high. The cell family includes approximately 80 cells incorporating conventional logic and flip-flop functions and is designed for maze routing with automatic place and route tools, such as CELL3. This cell family is unique in that all substrate and well connections are isolated from the digital power busses, allowing significantly reduced digital noise coupling to the substrate. Demonstrations of this cell library on the MOSIS.6 micron HP process (λ=.3 micron) are underway.
Keywords :
CMOS digital integrated circuits; VLSI; mixed analogue-digital integrated circuits; network routing; CELL3; MOSIS scaleable CMOS rules; MOSIS.6 micron HP process; SCMOS digital cell family; VLSI; digital noise coupling; flip-flop functions; maze routing; mixed-signal applications; place and route tools; substrate connections; triple-level metal processes; well connections; Application specific integrated circuits; Automatic logic units; CMOS process; Circuit noise; Consumer electronics; Crosstalk; Degradation; Noise reduction; Software libraries; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Print_ISBN :
0-7803-3694-1
DOI :
10.1109/MWSCAS.1997.662281
