DocumentCode
3220900
Title
A variable reordering method for fast optimization of binary decision diagrams
Author
Song, Moon-Bae ; Chang, Hoon
Author_Institution
Dept. of Comput. Sci., Soongsil Univ., Seoul, South Korea
fYear
1997
fDate
17-19 Nov 1997
Firstpage
228
Lastpage
233
Abstract
In this paper, a new variable ordering algorithm, distributed reordering algorithm that allows more faster solution than existing ones, is presented. Since this method can accomplish fast optimization of BDD in less memory and computation time, the proposed algorithm is more efficient for dynamic variable ordering. Also, the proposed algorithm can achieve more optimized results in combining with other variable ordering method
Keywords
circuit optimisation; computational complexity; logic CAD; binary decision diagrams; computation time; distributed reordering algorithm; dynamic variable ordering; optimization; variable reordering; window permutation; Application software; Binary decision diagrams; Boolean functions; Combinational circuits; Computer science; Data structures; Design automation; Logic design; Logic testing; Optimization methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian
Conference_Location
Akita
ISSN
1081-7735
Print_ISBN
0-8186-8209-4
Type
conf
DOI
10.1109/ATS.1997.643963
Filename
643963
Link To Document