An extended march test algorithm for embedded memories

Author

Park, Gang-Min ; Chang, Hoon

Author_Institution

Dept. of Comput. Sci., Soongsil Univ., Seoul, South Korea

fYear

1997

fDate

17-19 Nov 1997

Firstpage

404

Lastpage

409

Abstract

In this paper, an efficient test algorithm and BIST architecture for embedded memories are presented. The proposed test algorithm can fully detect stuck-at fault, transition fault, coupling fault. Moreover, the proposed test algorithm can detect neighborhood pattern sensitive fault, which could not be detected in previous march test algorithms. The proposed test algorithm performs testing for neighborhood pattern sensitive fault using background data, which has been used for word-oriented memory testing

Keywords

automatic testing; built-in self test; fault location; hardware description languages; integrated circuit testing; integrated memory circuits; BIST architecture; background data; coupling fault; efficient test algorithm; embedded memories; extended march test algorithm; neighborhood pattern sensitive fault; stuck-at fault; transition fault; word-oriented memory testing; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Logic testing; Performance evaluation; Read-write memory; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian

Conference_Location

Akita

ISSN

1081-7735

Print_ISBN

0-8186-8209-4

Type

conf

DOI

10.1109/ATS.1997.643990

Filename

643990