DocumentCode :
3222061
Title :
Static locality analysis for cache management
Author :
Sánchez, F. Jesús ; González, Antonio ; Velero, M.
Author_Institution :
Dept. of Comput. Archit., Univ. Politecnica de Catalunya, Barcelona, Spain
fYear :
1997
fDate :
10-14 Nov 1997
Firstpage :
261
Lastpage :
271
Abstract :
Most memory references in numerical codes correspond to array references whose indices are affine functions of surrounding loop indices. These array references follow a regular predictable memory pattern that can be analysed at compile time. This analysis can provide valuable information like the locality exhibited by the program, which can be used to implement more intelligent caching strategy. In this paper we propose a static locality analysis oriented to the management of data caches. We show that previous proposals on locality analysis are not appropriate when the proposals have a high conflict miss ratio. This paper examines those proposals by introducing a compile-time interference analysis that significantly improve the performance of them. We first show how this analysis can be used to characterize the dynamic locality properties of numerical codes. This evaluation show for instance that a large percentage of references exhibit any type of locality. This motivates the use of a dual data cache, which has a module specialized to exploit temporal locality, and a selective cache respectively. Then, the performance provided by these two cache organizations is evaluated. In both organizations, the static locality analysis is responsible for tagging each memory instruction accordingly to the particular type(s) of locality that it exhibits
Keywords :
cache storage; memory architecture; storage management; array references; cache management; compile-time interference analysis; data caches; dual data cache; locality analysis; selective cache; static locality analysis; temporal locality; Bandwidth; Computer architecture; Electronic mail; Information analysis; Interference; Microprocessors; Pattern analysis; Pollution; Proposals; Tagging;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Architectures and Compilation Techniques., 1997. Proceedings., 1997 International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-8186-8090-3
Type :
conf
DOI :
10.1109/PACT.1997.644022
Filename :
644022
Link To Document :
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