DocumentCode :
3222290
Title :
A test methodology for artificial neural networks
Author :
Belfore, Lee A., II ; Fleischer, Curtis A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Marquette Univ., Milwaukee, WI, USA
Volume :
2
fYear :
1995
fDate :
6-10 Nov 1995
Firstpage :
1400
Abstract :
This paper continues developments of a new and novel testing approach for detecting interconnection deletion faults in electronic implementations of artificial neural networks (ANNs). The testing approach is based on an unusual ANN behavior manifested by faulted ANNs having apparent better performance than fault-free ANNs, when neurons are operated with low activation function gains. Although transient, this noncoherent behavior can be used to detect interconnection deletion faults in ANNs. A hardware implementation of the digital aspects of the test circuitry is presented, suggesting the testing methodology may be suitable for built-in test. Simulation models of the proposed test circuitry have been verified and the implications of the testing methodology are discussed
Keywords :
automatic test equipment; digital instrumentation; fault diagnosis; neural nets; simulation; testing; LAGFD testing; artificial neural networks; built-in test; digital test circuitry; electronic implementation; hardware implementation; interconnection deletion faults detection; low activation function gains; low activation gain fault detection; noncoherent behavior; test methodology; Artificial neural networks; Circuit faults; Circuit testing; Electrical fault detection; Electronic equipment testing; Fault detection; Hardware; Integrated circuit interconnections; Neurons; Performance gain;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Electronics, Control, and Instrumentation, 1995., Proceedings of the 1995 IEEE IECON 21st International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-3026-9
Type :
conf
DOI :
10.1109/IECON.1995.484155
Filename :
484155
Link To Document :
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