Study of loading effect during development and etching process in photomask fabrication

As requirements of CD uniformity on photomasks continue to tighten with advanced logic and memory devices, dry etch processing should be adopted due to the needs of OPC and reduced bias processes. For logic devices, 16 nm CD uniformity will be required for 0.15 /spl mu/m generation, so dry etching technology should inevitably be introduced. However. It was already known that there is severe CD variation in the dry etching process due to Cr density. This, so called loading effect, has been investigated and solutions developed for wafer processing. However, in photomask processing, this loading effect is a little bit different because of the difference of field size and aspect ratio compared with the wafer case.