Title :
Meta-stable operation consideration of CMOS and BiCMOS static latch circuit
Author :
Dejhan, Kobchai ; Tooprakai, Paiboon ; Mitatha, Somsak ; Cheevasuvit, Fusak ; Soonyeekan, Chatcharin
Author_Institution :
Fac. of Eng., King Mongkut´´s Inst. of Technol., Bangkok, Thailand
Abstract :
This paper proposes a method to design both CMOS and BiCMOS latches by determining three constraints: the circuit power dissipation, the circuit area and the circuit speed. Meta-stable operation is observed by considering all three constraints. All simulation results have been produced based on the 0.8 μm design rule using the PSPICE simulator program
Keywords :
BiCMOS logic circuits; CMOS logic circuits; SPICE; circuit simulation; flip-flops; integrated circuit design; logic design; logic simulation; BiCMOS latch design; BiCMOS static latch circuit; CMOS latch design; CMOS static latch circuit; PSPICE simulator; circuit area; circuit power dissipation; circuit speed; design rule; meta-stable operation; simulation; BiCMOS integrated circuits; Bipolar transistors; Circuit simulation; Delay; Design optimization; Feedback loop; Inverters; Latches; Power dissipation; Semiconductor device modeling;
Conference_Titel :
Semiconductor Electronics, 2000. Proceedings. ICSE 2000. IEEE International Conference on
Conference_Location :
Guoman Port Dickson Resort
Print_ISBN :
0-7803-6430-9
DOI :
10.1109/SMELEC.2000.932454
