Title :
Hierarchical test approach using boundary scan test
Author :
Hasan, Muhammad Zafrul ; Siddiqi, Mohammad Umar
Author_Institution :
Fac. of Eng., Multimedia Univ., Cyberjaya, Malaysia
Abstract :
With integration and miniaturization of electronic components, physical access to the boundary of the components on a printed circuit board or system is almost impossible. The IEEE 1149.1 and the boundary scan test have evolved to meet this challenge by electronically accessing the component boundary. In this paper, application of boundary scan test techniques at different levels of digital systems is discussed. Test generation for different interconnection faults on printed circuit boards and test application through the standard test access port is considered. Acceptance and potential capabilities of the method are presented
Keywords :
IEEE standards; boundary scan testing; fault diagnosis; integrated circuit interconnections; integrated circuit packaging; integrated circuit testing; printed circuit testing; IEEE 1149.1; boundary scan test; boundary scan test techniques; digital systems; electronic component boundary access; electronic component integration; hierarchical test; interconnection faults; miniaturization; physical component boundary access; printed circuit board; standard test access port; system components; test application; Circuit testing; Electronic equipment testing; Electronic mail; Integrated circuit interconnections; Logic; Multimedia systems; Pins; Printed circuits; Shift registers; System testing;
Conference_Titel :
Semiconductor Electronics, 2000. Proceedings. ICSE 2000. IEEE International Conference on
Conference_Location :
Guoman Port Dickson Resort
Print_ISBN :
0-7803-6430-9
DOI :
10.1109/SMELEC.2000.932475
