DocumentCode
3223415
Title
Mixed-signal ICs in nano-scale technologies: Design and challenges
Author
Park, Byeong-Ha
Author_Institution
Semiconductor Business, Samsung Electronics Co., LTD., Korea
fYear
2009
fDate
25-27 Dec. 2009
Firstpage
2
Lastpage
2
Abstract
Analog design issues, impacts of scaling on power consumption in analog circuit and device performance in nanoscale CMOS technologies are discussed. An example of simple and effective digital calibration scheme will be explained as a method of overcoming power device performance in the technology. Low voltage RF circuits for GPS and mobile TV applications and analog circuits that avoid operational amplifiers will be briefly covered. Finally possibilities of analog circuits that do not suffer from the ´fundamental´ kT/C noise that we will call ´sub-kT/C circuits will also be introduced as a potential pathway for low power analog circuits. Analog circuits that avoid operational amplifiers and transmission gates will be briefly covered.
Keywords
CMOS analogue integrated circuits; nanoelectronics; analog circuit design; analog device design; digital calibration; global positioning system; low voltage RF circuits; mixed-signal IC; mobile TV; nanoscale CMOS technology; sub-kT/C circuits; Analog circuits; CMOS analog integrated circuits; CMOS technology; Calibration; Energy consumption; Global Positioning System; Low voltage; Nanoscale devices; Operational amplifiers; Radio frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2009. EDSSC 2009. IEEE International Conference of
Conference_Location
Xi´an
Print_ISBN
978-1-4244-4297-3
Electronic_ISBN
978-1-4244-4298-0
Type
conf
DOI
10.1109/EDSSC.2009.5394154
Filename
5394154
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