Test Chip for Characterization of Mechanical Stress Caused by Packaging Processes

This paper reports on a method for estimation and minimization of mechanical stress on MEMS sensor and actuator structures due to packaging processes based on flip chip technology. For studying mechanical stress a test chip with silicon diaphragms was fabricated. A network of piezo-resistive solid state resistors created by diffusion was used to measure the surface tension pattern between adjacent diaphragms. Finite element method simulation was used to calculate the stress profile and to determine the optimum positions for placing the resistive network