Imprint Technologies on Conductive Polymers and Metals for Interconnection and Bumping Purposes

Flip chip interconnection is more and more demanding in terms of cost, pitch and number of I/O´s. Together with wafer level packaging and ultra fine pitch packaging trends, imprint technologies have overcome some of the challenges for the next generation of packaging technologies. In this paper, imprint studies are presented with a particular emphasis on mould fabrication and imprint shapes regarding the post residual layer. Imprint studies on polyaniline based conductive polymers have been undertaken. We disclose promising results to implement a new low temperature, low cost hybridization technique. In parallel, imprint has also been carried out on metals showing the possibilities to implement either a low cost bumping technique with low melting point solders, or a new low cost hybridization technique at pitch as low as 4 mum