Title :
Fabrication and electrical characterization of MONOS memory with novel high- k gate stack
Author :
Liu, L. ; Xu, J.P. ; Chan, C.L. ; Lai, P.T.
Author_Institution :
Dept. of Electron. Sci. & Technol., Huazhong Univ. of Sci. & Technol., Wuhan, China
Abstract :
A novel high-κ gate stack structure with HfON/SiO2 as dual tunneling layer (DTL), AlN as charge storage layer (CSL) and HfAlO as blocking layer (BL) is proposed to prepare the charge-trapping type of MONOS non-volatile memory device by employing in-situ sputtering method. The memory window, program/erase and retention properties are investigated and compared with similar gate stack structure with Si3N4/SiO2 as DTL, HfO2 as CSL and Al2O3 as BL. Results show a large memory window of 3.55 V at P/E voltage of +8 V/-15 V, high program/erase speed and good retention characteristic can be achieved using the novel Au/ HfAlO/AlN/(HfON/SiO2)/Si gate stack structure. The main mechanisms lie in the enhanced electron injection through the high-κ HfON/SiO2 DTL, high trapping efficiency of the high-κ AlN material and effective blocking role of the high-κ HfAlO BL.
Keywords :
aluminium compounds; hafnium compounds; high-k dielectric thin films; random-access storage; silicon compounds; Al2O3; AlN; HfAlO; HfO2; HfON-SiO2; MONOS non-volatile memory; Si3N4-SiO2; blocking layer; charge storage layer; charge trapping; dual tunneling layer; high-κ gate stack; memory retention; memory window; program-erase speed; voltage 3.55 V; MONOS memory; blocking layer; charge storage layer; high-k gate stack; tunneling layer;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2009. EDSSC 2009. IEEE International Conference of
Conference_Location :
Xi´an
Print_ISBN :
978-1-4244-4297-3
Electronic_ISBN :
978-1-4244-4298-0
DOI :
10.1109/EDSSC.2009.5394199