On physical limits and challenges of interconnects for spin devices

In this paper, compact models of performance and energy dissipation of non-local spin torque devices as interconnects in an all-spin logic are obtained. Metallic interconnects such as Cu, Al, and single-layer graphene nanoribbons (GNR) may be used as conduits of spin information in spin-based circuits. Impact of size effects on the transport parameters and consequently on the circuit performance and energy dissipation of spin interconnects are exhaustively quantified. Spin interconnects are compacted against their CMOS counterparts at the 11.9nm technology node. Important insights into the physical limits and challenges of interconnects for future spin devices are identified to better guide the research in spintronics.