Title :
An Analytical Model on the Execution of Transactional Memory
Author :
Yu, Xiao ; He, Zhengyu ; Hong, Bo
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
In this paper, we develop an analytical model of the execution of transactional memory (TM) systems. This model employs queuing theory to analyze the impact of an essential set of TM design parameters including the conflict rate, number of checkpoints, and implementation overhead, etc. The model is validated via extensive experiments. To demonstrate the effectiveness of the model, we further study the performance impact of two factors. Our study shows that, for a given TM-based program, the frequency of performing checkpoint can be carefully chosen to minimize the mean transaction completion time. Our study also demonstrated the importance of reducing implementation overhead.
Keywords :
parallel programming; queueing theory; transaction processing; TM execution model; queuing theory; transactional memory system; Analytical models; Benchmark testing; Computational modeling; Hardware; Instruction sets; Steady-state; analytical model; performance analysis; transactional memory;
Conference_Titel :
Computer Architecture and High Performance Computing (SBAC-PAD), 2010 22nd International Symposium on
Conference_Location :
Petropolis
Print_ISBN :
978-1-4244-8287-0
Electronic_ISBN :
1550-6533
DOI :
10.1109/SBAC-PAD.2010.29