Title :
An enhanced double current limit technique used in high power BUCK converter
Author :
Zhou, Zekun ; Huang, Zhi ; Ming, Xing ; Zhang, Bo ; Li, Zhaoji
Author_Institution :
Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
An enhanced double current limit technique suitable for high power buck converter is presented in this paper to protect the converter from damage under any fault condition. The first peak current limit circuit works properly when the output is in minor over load. If the current increases continuously to some amount after the first peak current limit working in major overload or short circuit, the frequency of the buck converter is decreased by the second peak current limit circuit. The duty cycle can decrease below the value normally limited by the propagation delay in this way. The enhanced current limit technique has been validated with UMC 0.6-¿m BCD process based on a monolithic voltage-mode buck converter capable of driving up to 3 A loads with supply voltage from 8 to 30 V. Simulation results demonstrate that the proposed current limit technique can guarantee the buck converter operating properly under any condition without damage.
Keywords :
current limiters; power convertors; BCD process; duty cycle; enhanced double current limit technique; fault condition; high power buck converter; monolithic voltage-mode buck converter; peak current limit circuit; propagation delay; second peak current limit circuit; size 0.6 mum; voltage 8 V to 30 V; Buck converters; Circuit faults; Frequency conversion; Inductance; Inductors; MOSFET circuits; Propagation delay; Protection; Switched-mode power supply; Voltage;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2009. EDSSC 2009. IEEE International Conference of
Conference_Location :
Xi´an
Print_ISBN :
978-1-4244-4297-3
Electronic_ISBN :
978-1-4244-4298-0
DOI :
10.1109/EDSSC.2009.5394239