• DocumentCode
    3225050
  • Title

    Si3N4/SiO2 dielectric stacks for high reliable capacitive RF MEMS switch

  • Author

    Li, Gang ; Hanke, Ulrik ; Cheng, Zaijun ; Min, Deokki ; San, Haisheng ; Chen, Xuyuan

  • Author_Institution
    Fac. of Sci. & Eng., Vestfold Univ. Coll., Tonsberg, Norway
  • fYear
    2011
  • fDate
    15-18 Aug. 2011
  • Firstpage
    496
  • Lastpage
    499
  • Abstract
    SiO2/Si3N4 double-layer dielectric stacks, instead of single dielectric layer, have been investigated to mitigate charge accumulation in the dielectric for the purpose of high reliable capacitive microelectromechanical switch. Two kinds of double-dielectric-layers with different thickness ratios are structured, and SiO2 single-layer dielectric structure is also fabricated for comparison. The charge injection kinetics in the dielectric layer has been investigated by performing C-V measurements on metal-insulator-semiconductor (MIS) capacitor structure instead of an actual switch. The experiment results generally show that low charge accumulation has been achieved by using double-layer dielectric stacks. More in detail, the experiment results further show that the charge accumulation behaviors varied greatly with the different thickness ratio of Si3N4 to SiO2. With same positive dc bias voltage for charge injection, we found that net negative charge accumulated in the thin-oxide MNOS structure and net positive charge accumulated in the thick-oxide MNOS structure as the electron injection is suppressed by the thick oxide. It can be anticipated that the charge accumulation in the switch dielectric can be minimized by optimizing the thickness ratio of double-layer dielectric.
  • Keywords
    dielectric devices; integrated circuit reliability; microswitches; radiofrequency integrated circuits; C-V measurement; MIS capacitor; Si3N4-SiO2; charge accumulation; charge injection kinetics; dielectric layer; double-layer dielectric stack; electron injection; high reliable capacitive RF MEMS switch; high reliable capacitive microelectromechanical switch; metal-insulator-semiconductor; positive dc bias voltage; single-layer dielectric structure; switch dielectric; thick-oxide MNOS structure; thickness ratio; thin-oxide MNOS structure; Capacitance-voltage characteristics; Dielectric measurements; Dielectrics; MOS devices; Silicon; Tunneling; Voltage measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on
  • Conference_Location
    Portland, OR
  • ISSN
    1944-9399
  • Print_ISBN
    978-1-4577-1514-3
  • Electronic_ISBN
    1944-9399
  • Type

    conf

  • DOI
    10.1109/NANO.2011.6144348
  • Filename
    6144348