• DocumentCode
    3225916
  • Title

    Considerations in selecting a design-for-testability technique

  • Author

    Hess, Robert D.

  • Author_Institution
    Digital Equipment Corp., Colorado Springs, CO, USA
  • fYear
    1988
  • fDate
    21-23 Mar 1988
  • Firstpage
    157
  • Lastpage
    160
  • Abstract
    The four major design-for-testability (DFT) techniques-ad hoc, built-in-self-test (BIST), structured, and semistructured approaches-differ widely in their ability to meet a products test needs. A few practical guidelines can aid in choosing the DFT approach that is best for your project. The techniques are reviewed, followed by a description of the selection criteria, and concluding with the various DFT techniques being compared using the criteria to do the tradeoff analysis
  • Keywords
    electronic equipment testing; network synthesis; ad hoc technique; built-in-self-test; design-for-testability technique; semistructured approach; structured technique; tradeoff analysis; Application specific integrated circuits; Automatic testing; Built-in self-test; Circuit testing; Costs; Design for testability; Guidelines; Integrated circuit testing; Logic testing; Manufacturing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    IEEE Region 5 Conference, 1988: 'Spanning the Peaks of Electrotechnology'
  • Conference_Location
    Colorado Springs, CO
  • Type

    conf

  • DOI
    10.1109/REG5.1988.15921
  • Filename
    15921