Title :
Impact of oxide trap charge on performance of strained fully depleted SOI metal-gate MOSFET
Author :
Yeh, W.K. ; Wang, C.C. ; Hsu, C.-W. ; Fang, Y.K. ; Wu, S.M. ; Ou, C.C. ; Lin, C.L. ; Gan, K.J. ; Weng, C.J. ; Chen, P.Y. ; Yuan, J.S. ; Liou, J.J.
Author_Institution :
Dept. of Electr. Eng., Nat. Univ. of Kaohsiung, Kaohsiung, Taiwan
Abstract :
The impact of strain induced oxide trap charge on the performance and reliability of contact etch stop SiN layer capped, fully silicided metal gate, fully depleted SOI (FDSOI) CMOSFET is investigated. For an ultra thin nitride oxide, the position of these oxide trap charge can be evaluated by variable frequency noise spectrum and variable frequency charge pumping technique. Gate oxide film bending caused by net stress from these strain technologies was considered as the main reason for bulk oxide trap charge formation. We find that a strained SOI MOSFET with a thinner SOI is more subjective to the stress than the thicker one, and the thinner SOI device possesses a higher oxide/Si interface trap charge density which will degrade the channel mobility. On the other hand, more bulk oxide trap, which existed in the strained device having a thicker SOI, was the dominate factor on current/voltage stress induced device degradation.
Keywords :
MOSFET; electron traps; hole traps; semiconductor device metallisation; semiconductor device reliability; silicon compounds; silicon-on-insulator; MOSFET; SiN; contact etch reliability; device degradation; fully depleted SOI; fully silicided metal gate; strain induced oxide trap charge; variable frequency charge pumping; variable frequency noise spectra; CMOS technology; CMOSFETs; Capacitive sensors; Charge pumps; Degradation; Etching; Frequency; MOSFET circuits; Silicon compounds; Stress;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2009. EDSSC 2009. IEEE International Conference of
Conference_Location :
Xi´an
Print_ISBN :
978-1-4244-4297-3
Electronic_ISBN :
978-1-4244-4298-0
DOI :
10.1109/EDSSC.2009.5394288