Title :
A tunable transconductor with high linearity
Author :
Bhadauria, Vijaya ; Kant, Krishna ; Banerjee, Swapna
Author_Institution :
Electron. & Commun. Eng. Dept., Motilal Nehru Nat. Inst. of Technol., Allahabad, India
Abstract :
In this paper a high frequency low voltage low power tunable highly linear transconductor is presented. Shift level biasing is used at the inputs of both the amplifiers of a cross coupled differential pair for tuning. Bias currents of cross coupled differential amplifiers are adjusted to cancel third harmonic distortion. The proposed circuit is simulated in Cadence VIRTUOSO environment with UMC 0.18 μm CMOS process technology. Simulation results show that for the biasing current of 206 μA (Gm of 222 μS), the circuit exhibits less than -51 dB total third harmonic distortion (HD3) at 1 Vp-p @ 50 MHz.
Keywords :
differential amplifiers; harmonic distortion; linearisation techniques; low-power electronics; CMOS process; Cadence VIRTUOSO environment; bias currents; cross coupled differential amplifiers; cross coupled differential pair for tuning; current 206 muA; low voltage low power tunable highly linear transconductor; shift level; size 0.18 mum; third harmonic distortion; CMOS integrated circuits; Differential amplifiers; Linearity; Threshold voltage; Transconductance; Transistors; Tuning; Analog CMOS Circuit; Harmonic Distortion Analysis; Linearization Techniques; Operational Transconductance Amplifier (OTA); Tunable Transconductor;
Conference_Titel :
Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-7454-7
DOI :
10.1109/APCCAS.2010.5774749
