DocumentCode
3226105
Title
Automatic verification of EMC immunity by simulation
Author
Vrignon, Bertrand ; Caunegre, P. ; Shepherd, John ; Jianfei Wu
Author_Institution
Freescale Semicond., Toulouse, France
fYear
2013
fDate
15-18 Dec. 2013
Firstpage
202
Lastpage
207
Abstract
Immunity of analog circuit blocks is becoming a major design risk. This paper presents an automated methodology to simulate the susceptibility of a circuit during the design phase. More specifically, we propose a CAD tool which determines the fail/pass criteria of a signal under direct power injection (DPI). This contribution describes the function of the tool which is validated by a LDO regulator.
Keywords
CAD; automatic testing; circuit simulation; electromagnetic compatibility; CAD tool; EMC immunity; LDO regulator; analog circuit blocks; automated methodology; automatic verification; circuit susceptibility; direct power injection; fail/pass criteria; Frequency measurement; Immunity testing; Integrated circuit modeling; Load modeling; Regulators; Circuit simulation; direct power injection; immunity; susceptibility;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility of Integrated Circuits (EMC Compo), 2013 9th Intl Workshop on
Conference_Location
Nara
Type
conf
DOI
10.1109/EMCCompo.2013.6735201
Filename
6735201
Link To Document