A 48 MHz, hermetic, 0.48 mm2 chip-scale packaged USB3.0 oscillator integrating an FBAR resonator with CMOS circuitry

Most ASIC (Application Specific Integrated Circuits) chips have a common need for clocking. The clock is usually supplied by the end-user of the ASIC chip and consists of a quartz crystal resonator, two precision capacitors, and an on-chip inverter driver. An ASIC supplier that can integrate the clock inside their package will have a product differentiator relative to their competitors. We demonstrate a zero drift FBAR Resonator (ZDR) with a native Q of 3000 and a temperature stability of ±50 ppm integrated with a CMOS oscillator core, all bias circuitry, oscillator buffer, dividers, and output buffer. The 0.6μm node CMOS circuitry is integrated in the silicon lid of the microcapped device. Since many thousands of packaged die are created on each wafer, one can take a significant amount of statistics on the effect of frequency shift due to environmental stress (HAST, Autoclave, thermal shock). This allows us to accurately quantify aging effects as well as the most likely forms of device failures in the field.