DocumentCode :
3227185
Title :
General purpose logic gate using ballistic nanotransistors
Author :
Wolpert, D. ; Iñiguez-de-la-Torre, I. ; Kaushal, V. ; Margala, M. ; Ampadu, P.
Author_Institution :
Univ. of Rochester, Rochester, NY, USA
fYear :
2011
fDate :
15-18 Aug. 2011
Firstpage :
1171
Lastpage :
1176
Abstract :
This paper presents a new type of logic gate and associated circuit concepts for a recently proposed device, the ballistic deflection transistor (BDT). The BDT is a planar structure based on InGaAs/InAlAs etched into a two-dimensional electron gas (2DEG), and exhibits ballistic transport behavior at room temperature. We propose a general purpose gate (GPG) configuration and present measured results from a fabricated GPG using BDTs, as well as a simulation model for examining other GPG configurations. Using this scheme, any 2-input logic function and its compliment can be realized by selectively connecting the four GPG output terminals.
Keywords :
III-V semiconductors; aluminium compounds; electron gas; gallium arsenide; indium compounds; logic gates; nanotechnology; 2-input logic function; InGaAs-InAlAs; ballistic deflection transistor; ballistic nanotransistors; general purpose logic gate; planar structure; two-dimensional electron gas; Integrated circuit modeling; Joining processes; Logic functions; Logic gates; Noise; Simulation; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on
Conference_Location :
Portland, OR
ISSN :
1944-9399
Print_ISBN :
978-1-4577-1514-3
Electronic_ISBN :
1944-9399
Type :
conf
DOI :
10.1109/NANO.2011.6144451
Filename :
6144451
Link To Document :
بازگشت