Analysis of the Performance of CTH on Commodity Processor-Based Systems

The U.S. Army Research Laboratory (ARL) Major Shared Resource Center (MSRC) has recently installed three systems using commodity processors, each with distinct strengths. The three systems are: an SGI Altix3700 with 256 Intel Itanium2 processors, an IBM Cluster 1350 with 2304 AMD Opteron processors, and a Linux Networx Evelocity2 with 2048 Intel Xeon processors with extended memory technology. All three systems were acquired via the DoD High Performance Computing Modernization Program’s (HPCMP’s) Technology Insertion 2004 process. The Interim03 version of the CTH code from Sandia National Laboratories gn [1] was used as a basis for this study. Understanding the performance of CTH is a very worthwhile effort because of the vast requirements within the HPCMP for solving problems in the shock physics field. CTH usage may surpass 10 million processor hours in fiscal year 2005. A large database of CTH performance on many HPCMP resources[2,3,4], past and present, was used to put the achieved level of performance into perspective. The Interim03 version of the CTH code from Sandia National Laboratories was built on each system, and a penetration problem was run for processor counts varying from 1 to the full system size by powers of 2. Multiple compilers and build options for each system were used to find the best combination for the CTH problem used as a benchmark.