Title :
Efficient protocol converter generation for system integration
Author :
Yang, Der-Wei ; Shieh, Ming-Der ; Kuo, Wen-Hsuen ; Wang, Jonas
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng-Kung Univ., Tainan, Taiwan
Abstract :
Integrate intellectual properties (IP´s) designed for different protocols is always a troublesome task for system integrators. In this paper, we explore efficient methods to generate protocol converters automatically under the consideration of system performance. For the frequency/phase mismatch, we proposed a modified asynchronous FIFO together with our protocol converter. The generated results are verified in Synopsis Verification IP (VIP) environment. The performance and cost of the resulted converter are as efficient as the manual one, ARM Prime Cell.
Keywords :
industrial property; protocols; system-on-chip; ARM prime cell; frequency mismatch; intellectual property; modified asynchronous FIFO; phase mismatch; protocol converter generation; synopsis verification IP; system integration; system-on-chip; Bridges; Clocks; Computers; Pipelines; asynchronous handshaking; protocol converter;
Conference_Titel :
Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-7454-7
DOI :
10.1109/APCCAS.2010.5774831
