Investigations on some KGD approaches for space applications

The gradual shift from low and medium complexity hybrids used for space applications until now, to high complexity multichip modules that will be needed in the near future has directed the attention of ESA and CNES toward the very important need of using known good dies in MCMs manufactured for space applications. A study contract has therefore been funded jointly by the two space agencies with Matra Marconi Space (France) to address this matter and carry out practical testing to highlight possible approaches to KGD with regard to particular space concerns and requirements. This paper describes the “old” approach of chip lot acceptance and compares it with two “new” KGD methods: the utilization of membrane test sockets that allow full temperature testing and burn-in, and the application of “chip re-routing” on the top surface of the chip with “temporary mountings” for testing and burn-in. A practical test plan on a test vehicle made of nonKGD chips coming from the same wafer has been carried out in two major steps: firstly, performing a full KGD flow on each die, and secondly, testing them before and after aging according to space requirements. The results of these different methods demonstrate their efficiency, verify that no disturbing effects or damage to the dice are induced by the KGD processes themselves, and also provide means of carrying out a cost comparison. Furthermore, they give guidelines for the possible updating of ESA specifications in this area