DocumentCode
3228953
Title
Area and power efficient design of coarse time synchronizer and frequency offset estimator for fixed WiMAX systems
Author
Kim, Tae-Hwan ; Park, In-Cheol
Author_Institution
Korea Adv. Inst. of Sci. & Technol., Seoul
fYear
2008
fDate
21-24 March 2008
Firstpage
111
Lastpage
112
Abstract
Targeting fixed WiMAX systems, this paper presents a new architecture for coarse time synchronization and carrier frequency offset (CFO) estimation. The proposed architecture is based on a two-step approach where the data-paths are decoupled to individually optimize performance and area. Implemented with 0.13 mum CMOS technology, the results show that the proposed architecture has advantages of less silicon area and power consumption as well as better performance compared to the previous joint approach.
Keywords
CMOS integrated circuits; WiMax; frequency estimation; synchronisation; CMOS technology; coarse time synchronizer; fixed WiMAX systems; frequency offset estimator; size 0.13 mum; Autocorrelation; CMOS technology; Energy consumption; Frequency estimation; Frequency synchronization; Interchannel interference; Power generation economics; Shift registers; Silicon; WiMAX;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location
Seoul
Print_ISBN
978-1-4244-1921-0
Electronic_ISBN
978-1-4244-1922-7
Type
conf
DOI
10.1109/ASPDAC.2008.4483920
Filename
4483920
Link To Document