Title :
Predictive models and CAD methodology for pattern dependent variability
Author :
Verghese, Nishath ; Rouse, Richard ; Hurat, Philippe
Author_Institution :
Cadence Design Syst., San Jose
Abstract :
Lithography, etch and stress are dominant effects impacting the functionality and performance of designs at 65 nm and below. This paper discusses pattern dependent variability caused by these effects and discusses a model-based approach to extracting this variability. A methodology to gauge the extent of this pattern dependent variability for standard cells is presented by looking at the difference in transistor parameters when the cell is analyze in different contexts. A full-chip methodology that addresses the delay change due to systematic varation has been introduced to analyze and repair a 65 nm digital design.
Keywords :
CAD; integrated circuit design; lithography; CAD methodology; digital design; etch; full-chip methodology; lithography; pattern dependent variability; predictive models; standard cells; stress; systematic varation; transistor parameters; Compressive stress; Design for manufacture; Electron mobility; Etching; Lithography; MOS devices; Manufacturing; Predictive models; Silicon; Tensile stress;
Conference_Titel :
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-1921-0
Electronic_ISBN :
978-1-4244-1922-7
DOI :
10.1109/ASPDAC.2008.4483943
