A 40-GHz phase-locked loop front-end for 60-GHz transceivers in 65nm CMOS

Author

Cheema, Hammad M. ; Mahmoudi, Reza ; van Roermund, Arthur

Author_Institution

Dept. of Electr. Eng., Eindhoven Univ. of Technol., Eindhoven, Netherlands

fYear

2010

fDate

6-9 Dec. 2010

Firstpage

967

Lastpage

970

Abstract

A phase-locked loop front-end including a LC voltage controlled oscillator and an I-Q injection locked frequency divider is presented. The operation ranges of the VCO and ILFD are aligned by co-designing the tank, specifically the tunable varactors. The total locking range of the front-end is 37.6 to 42.2 GHz which corresponds to a down-conversion range from 56.4 to 63.3 GHz at 60 GHz, thus covering the complete ISM band. The front-end phase noise for a VCO frequency of 39.8 GHz is -102 dBc/Hz at 1 MHz offset. The DC power consumption of the VCO and Q-ILFD is 6mW and 9mW from a 1.2 V supply, respectively. Implemented in a bulk CMOS 65nm technology, the circuit occupies an area of 0.7 × 0.5 mm².

Keywords

frequency dividers; injection locked oscillators; phase locked loops; radio transceivers; voltage-controlled oscillators; I-Q injection locked frequency divider; LC voltage controlled oscillator; frequency 37.6 GHz to 42.2 GHz; frequency 39.8 GHz; frequency 56.4 GHz to 63.3 GHz; front-end phase noise; phase-locked loop front-end; power 6 mW; power 9 mW; size 65 nm; transceivers; tunable varactors; voltage 1.2 V; CMOS integrated circuits; Capacitance; Phase locked loops; Phase noise; Transceivers; Tuning; Voltage-controlled oscillators; injection locked frequency divider; phase locked loop; voltage controlled oscillator;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-4244-7454-7

Type

conf

DOI

10.1109/APCCAS.2010.5774963

Filename

5774963