DocumentCode
3230822
Title
Comparison of power and performance for the TFET and MOSFET and considerations for P-TFET
Author
Avci, Uygar E. ; Rios, Rafael ; Kuhn, Kelin J. ; Young, Ian A.
Author_Institution
Technol. & Manuf. Group, Intel Corp., Hillsboro, OR, USA
fYear
2011
fDate
15-18 Aug. 2011
Firstpage
869
Lastpage
872
Abstract
A detailed circuit assessment of Tunneling Field Effect Transistors (TFET) versus MOSFET transistors operating at a supply voltage near device threshold is reported, including the consideration of P-TFET device design. 20nm gate-length InAs TFET and Si MOSFET device characteristics are simulated and used in circuit simulations. For ultra low power logic applications, TFET logic can operate at equal standby power and switching energy to MOSFET logic, but with better performance. The study shows that the P-TFET device has a lower ION/IOFF ratio than the N-TFET due to the low conduction-band density of states (DOS) in III-V materials. It is shown that for a specific TFET power-performance target, the source doping level needs to be optimized.
Keywords
MOSFET; field effect transistors; logic circuits; low-power electronics; tunnel transistors; MOSFET; TFET logic; low conduction-band density of states; tunneling field effect transistors; ultra low power logic applications; Doping; Integrated circuit modeling; Performance evaluation; Power MOSFET; Switches; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on
Conference_Location
Portland, OR
ISSN
1944-9399
Print_ISBN
978-1-4577-1514-3
Electronic_ISBN
1944-9399
Type
conf
DOI
10.1109/NANO.2011.6144631
Filename
6144631
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