• DocumentCode
    3231034
  • Title

    Vertical via design techniques for multi-layered P/G networks

  • Author

    Li, Shuai ; Shi, Jin ; Cai, Yici ; Hong, Xianlong

  • Author_Institution
    Tsinghua Univ., Beijing
  • fYear
    2008
  • fDate
    21-24 March 2008
  • Firstpage
    623
  • Lastpage
    628
  • Abstract
    In multi-layered power/ground (P/G) networks, to connect the whole network together, vertical vias are usually placed at intersections between metal wires of adjoining layers. In this paper, a deep study about the design of vertical vias is presented. First we present an efficient heuristic algorithm based on sensitivity analysis to optimize via allocation in early design stage. Compared with even allocation, averagely our algorithm is capable of reducing worst voltage drop by 8.43% while using the same or even less number of vias. Also, adjoint network method is utilized and significantly improves the efficiency of our algorithm. Next, we demonstrate that by linking metal wires of nonadjacent layers, cross-layer vias are powerful in eliminating "hot" areas which suffer from large voltage drop on bottom layer. A similar heuristic algorithm is also developed for the addition of cross-layer vias.
  • Keywords
    VLSI; sensitivity analysis; adjoint network method; heuristic algorithm; metal wires; multilayered power-ground networks; nonadjacent layers; sensitivity analysis; voltage drop; Algorithm design and analysis; Circuits; Computer science; Design optimization; Heuristic algorithms; Iterative algorithms; Optimization methods; Sensitivity analysis; Voltage; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
  • Conference_Location
    Seoul
  • Print_ISBN
    978-1-4244-1921-0
  • Electronic_ISBN
    978-1-4244-1922-7
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2008.4484027
  • Filename
    4484027