Title :
A study of worst case degradation in both SOI/NMOSFETs and PMOSFETs by the use of gated-diode measurement
Author :
Li, Yujun ; Ma, T.P.
Author_Institution :
Center for Microelectron. Mater. & Structures, Yale Univ., New Haven, CT, USA
fDate :
30 Sep-3 Oct 1996
Abstract :
Summary form only given. This paper reports our recent results from gated-diode measurements on hot-carrier damaged SOI/NMOSFETs and PMOSFETs. The worst case degradation conditions for SOI/MOSFETs have been identified, and similarities as well as differences between SOI and bulk devices are discussed. The devices used in this study are fully-depleted SOI/MOSFETs with LDD structure made on SIMOX wafers with body contacts. The thicknesses of the gate oxide, silicon film, and buried oxide are 10 nn, 100 nm, and 500 nm respectively. The channel length is 2 μm, while the channel widths are 475 μm and 20 μm. All the front-channel characteristics were measured with back gate biased to strong accumulation
Keywords :
MOSFET; electron traps; electron-hole recombination; hot carriers; silicon-on-insulator; 10 to 500 nm; 2 micron; 20 micron; 475 micron; LDD structure; SIMOX wafers; SOI NMOSFETs; SOI PMOSFETs; Si; body contacts; buried oxide; front-channel characteristics; fully-depleted SOI MOSFETs; gated-diode measurement; hot-carrier damaged MOSFET; strong accumulation; worst case degradation; Charge pumps; Computer aided software engineering; Current measurement; Degradation; Electron traps; MOSFETs; Performance evaluation; Stress measurement; Transconductance; Voltage;
Conference_Titel :
SOI Conference, 1996. Proceedings., 1996 IEEE International
Conference_Location :
Sanibel Island, FL
Print_ISBN :
0-7803-3315-2
DOI :
10.1109/SOI.1996.552492
