• DocumentCode
    3231095
  • Title

    A 0.5V 65nm-CMOS single phase clocked bootstrapped switch with rise time accelerator

  • Author

    Shikata, Akira ; Sekimoto, Ryota ; Ishikuro, Hiroki

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Keio Univ., Yokohama, Japan
  • fYear
    2010
  • fDate
    6-9 Dec. 2010
  • Firstpage
    1015
  • Lastpage
    1018
  • Abstract
    This paper presents a twice the supply voltage bootstrapped switch with the proposed rise time accelerator that has high linearity and fast rising with single phase clock input at low voltage. The proposed rise time accelerator improves rising time and ensures circuit operation at extremely low supply voltage without any complex timing generation circuit. The prototype switch is designed in 65nm CMOS process and the simulation results show that the power consumption of quasi differential bootstrapped switch is less than 11nW/MHz at a supply voltage of 0.5V with 10MS/sec. The third order harmonic distortion (HD3) is -104dB with sampling capacitor of 1.28pF.
  • Keywords
    CMOS integrated circuits; bootstrap circuits; harmonic distortion; low-power electronics; semiconductor switches; CMOS single phase clocked bootstrapped switch; capacitance 1.28 pF; low supply voltage; power consumption; quasidifferential bootstrapped switch; rise time accelerator; sampling capacitor; single phase clock input; size 65 nm; supply voltage bootstrapped switch; third order harmonic distortion; voltage 0.5 V; CMOS integrated circuits; Capacitors; Clocks; Logic gates; Low voltage; Switches; Switching circuits; Bootstrapped Switch; Energy harvesting; Low voltage; Sample and Hold; Sensor network; Series bootstrapping;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4244-7454-7
  • Type

    conf

  • DOI
    10.1109/APCCAS.2010.5774976
  • Filename
    5774976