Title :
Test vector chains for increased targeted and untargeted fault coverage
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Purdue Univ., West Lafayette
Abstract :
We introduce the concept of test vector chains, which allows us to obtain new test vectors from existing ones through single-bit changes without any test generation effort. We demonstrate that a test set T 0 has a significant number of test vector chains that are effective in increasing the numbers of detections of target faults, i.e., faults targeted during the generation of T 0, as well as untargeted faults, i.e., faults that were not targeted during the generation of T 0.
Keywords :
automatic test pattern generation; fault location; fault coverage; test vector chains; Built-in self-test; Cities and towns; Fault detection; Fault diagnosis; Testing;
Conference_Titel :
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-1921-0
Electronic_ISBN :
978-1-4244-1922-7
DOI :
10.1109/ASPDAC.2008.4484034