Software-cooperative power-efficient heterogeneous multi-core for media processing

Author

Shikano, Hiroaki ; Ito, Masaki ; Uchiyama, Kunio ; Odaka, Toshihiko ; Hayashi, Akihiro ; Masuura, Takeshi ; Mase, Masayoshi ; Shirako, Jun ; Wada, Yasutaka ; Kimura, Keiji ; Kasahara, Hironori

Author_Institution

Hitachi Ltd., Tokyo

fYear

2008

fDate

21-24 March 2008

Firstpage

736

Lastpage

741

Abstract

A heterogeneous multi-core processor (HMCP) architecture, which integrates general purpose processors (CPU) and accelerators (ACC) to achieve high-performance as well as low-power consumption with the support of a parallelizing compiler, was developed. The evaluation was performed using an MP3 audio encoder on a simulator that accurately models the HMCP. It showed that 16-frame encoding on the HMCP with four CPUs and four ACCs yielded 24.5-fold speed-up of performance against sequential execution on one CPU. Furthermore, power saving by the compiler reduced energy consumption of the encoding to 0.17 J, namely, by 28.4%.

Keywords

multimedia computing; multiprocessing systems; general purpose accelerators; general purpose processors; heterogeneous multicore processor architecture; media processing; software-cooperative power-efficient heterogeneous multicore processor; Computer architecture; Digital audio players; Encoding; Energy consumption; Memory architecture; Multicore processing; Nonhomogeneous media; Optimizing compilers; Scheduling; Software performance;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific

Conference_Location

Seoul

Print_ISBN

978-1-4244-1921-0

Electronic_ISBN

978-1-4244-1922-7

Type

conf

DOI

10.1109/ASPDAC.2008.4484049

Filename

4484049