Parallelization of simulation engine for BOM component on multi-core

Author

Qiang, He ; Yong, Peng ; Ming-xin, Zhang ; Jian-xing, Gong

Author_Institution

Sch. of Mechatron. & Autom., Nat. Univ. of Defense Technol., Changsha, China

fYear

2011

fDate

27-29 May 2011

Firstpage

250

Lastpage

254

Abstract

The development of chip manufacture has stepped into the era of multi-core, demanding a paradigm shift in how software is developed, especially in time-critical computation - ally intensive simulation applications. How to parallelize the simulation engine for BOM component on multi-core and two different approaches were discussed. A threaded parallel discrete event simulation engine was designed and implemented using shared memory pattern. On a quad-core computer, both the speedup and CPU utilization of the parallel engine were studied. The experiment results show that the new engine could achieve good speedup and exploit the capability of multi-core.

Keywords

microprocessor chips; multiprocessing systems; BOM component; chip manufacture development; multicore system; parallel discrete event simulation engine; parallel engine; quadcore computer; shared memory pattern; simulation engine parallelization; Argon; Computational modeling; basic object model componet; multi-core; parallel discrete event simulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Communication Software and Networks (ICCSN), 2011 IEEE 3rd International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-61284-485-5

Type

conf

DOI

10.1109/ICCSN.2011.6014263

Filename

6014263