• DocumentCode
    3231741
  • Title

    In situ dielectric etch process technology for advanced leading edge production worthy etch applications

  • Author

    Ding, Jian ; Arleo, Paul ; Hasselbach, Joe

  • Author_Institution
    Appl. Mater. Inc., Santa Clara, CA, USA
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    161
  • Lastpage
    163
  • Abstract
    In situ integrated dielectric etch processes are developed for advanced applications, such as self aligned contact and dual damascene structures, in the inductively coupled parallel plate semiconducting chamber. The integrated, in situ process steps include BARC opening, oxide or low k etch with high etch rate and high selectivity to nitride, resist/polymer strip, and nitride removal. This in situ capability will provide significant productivity benefits for structures that require multiple sequential process steps typically involving multiple chambers or systems
  • Keywords
    semiconductor device manufacture; semiconductor technology; sputter etching; BARC opening etch; advanced applications; dual damascene structures; high etch rate; high selectivity; high throughput; in situ dielectric etch process technology; inductively coupled; integrated in situ process steps; leading edge production worthy etch applications; low k etch; multiple sequential process steps; nitride removal; oxide etch; parallel plate semiconducting chamber; productivity benefits; resist/polymer strip; self aligned contact; Dielectric materials; Etching; Plasma applications; Polymers; Positron emission tomography; Production; Productivity; Resists; Semiconductor materials; Strips;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Semiconductor Manufacturing Conference and Workshop, 1999 IEEE/SEMI
  • Conference_Location
    Boston, MA
  • ISSN
    1078-8743
  • Print_ISBN
    0-7803-5217-3
  • Type

    conf

  • DOI
    10.1109/ASMC.1999.798211
  • Filename
    798211