Low series noise and low power preamplifiers for cryogenic applications in the GaAs CHFET technology from Honeywell

Author

Christoforou, G. ; Dzahini, D. ; Pouxe, J. ; Rossetto, O. ; Baier, S. ; Peczalski, A.

Author_Institution

Inst. des Sci. Nucl., CNRS, Grenoble, France

fYear

1997

fDate

9-15 Nov 1997

Firstpage

192

Abstract

In this paper are reported two folded cascode preamplifiers in a GaAs complementary heterostructure FET technology. With a 35 mW bias power dissipation, the equivalent input series noise voltage power density is e_n=0.32 nV/√(Hz) for the first circuit with a NFET in the input stage, while the second circuit using a PFET in the input exhibits a series noise coefficient e_n=0.8 nV/√(Hz). The dynamic range on a 50 Ω load for both preamplifiers is better than 2 V with ±0.5% and ±0.8% of full scale range non linearity

Keywords

III-V semiconductors; cryogenic electronics; field effect analogue integrated circuits; gallium arsenide; integrated circuit noise; nuclear electronics; preamplifiers; 2 V; 35 mW; 50 ohm; GaAs; GaAs CHFET; GaAs complementary heterostructure FET; NFET; PFET; bias power dissipation; dynamic range; equivalent input series noise voltage power density; folded cascode preamplifiers; low power preamplifiers; low series noise preamplifiers; series noise coefficient; CMOS technology; Circuit noise; Cryogenics; FETs; Gallium arsenide; Indium gallium arsenide; Noise shaping; Power dissipation; Preamplifiers; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium, 1997. IEEE

Conference_Location

Albuquerque, NM

ISSN

1082-3654

Print_ISBN

0-7803-4258-5

Type

conf

DOI

10.1109/NSSMIC.1997.672567

Filename

672567