DocumentCode
3231802
Title
A 1.2GHz delayed clock generator for high-speed microprocessors
Author
Jung, Inhwa ; Kim, Moo-Young ; Kim, Chulwoo
Author_Institution
Korea Univ., Seoul
fYear
2008
fDate
21-24 March 2008
Firstpage
95
Lastpage
96
Abstract
A 1.2GHz delayed clock generator capable of adjusting its clock phase according to input clock frequencies has been developed. It consists of a full-digital CMOS circuit that leads to a simple, robust, and portable IP. One-cycle lock time enables clock-on-demand circuit structures. The implemented delayed clock generator tile in 0.13 um CMOS technology occupies only 0.004 mm and operates at variable input frequencies ranging from 625 MHz to 1.2GHz.
Keywords
CMOS digital integrated circuits; clocks; microprocessor chips; clock phase; clock-on-demand circuit structures; delayed clock generator; frequency 625 MHz to 1.2 GHz; full-digital CMOS circuit; high-speed microprocessors; one-cycle lock time; portable IP; size 0.13 mum; Circuits; Clocks; Delay; Detectors; Energy consumption; Frequency; Inverters; Microprocessors; Phase detection; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location
Seoul
Print_ISBN
978-1-4244-1921-0
Electronic_ISBN
978-1-4244-1922-7
Type
conf
DOI
10.1109/ASPDAC.2008.4484068
Filename
4484068
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