DocumentCode
3231912
Title
Modeling of DLL-based frequency multiplier in time and frequency domain with Matlab Simulink
Author
Gholami, Mohammad ; Sharifkhani, Mohammad ; Saeedi, Saeed
Author_Institution
Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran
fYear
2010
fDate
6-9 Dec. 2010
Firstpage
1051
Lastpage
1054
Abstract
A systematic procedure of simulating charge pump based delay locked loops (DLLs) represents in this paper. The presented procedure is based on the systematic modeling of the DLL components in Matlab Simulink simulator. The system has been designed for 1Hz input clock signal that by changing the whole system scale, it can be used for every other input frequencies. The simulation results in Matlab and design considerations for DLL based frequency multiplier are presented.
Keywords
charge pump circuits; circuit simulation; delay lock loops; frequency multipliers; DLL-based frequency multiplier; Matlab Simulink; charge pump based delay locked loops; frequency domain; time domain; Clocks; Delay; Frequency synthesizers; Integrated circuit modeling; Mathematical model; Phase frequency detector; Phase locked loops; DLL; DLL Modeling; Delay locked loop; Frequency Synthesizer Modeling; MATLAB Simulink;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-7454-7
Type
conf
DOI
10.1109/APCCAS.2010.5775021
Filename
5775021
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