Low temperature direct bonding technology for wafer-scale integration and packaging

A spontaneous low-temperature bonding process was developed for silicon wafer direct bonding. Experiments were conducted to investigate critical process parameters with blank silicon wafers at 120degC. The effects of interfacial micro/nano- scale roughness on bonding were mainly considered. The results showed that different interfacial roughness may lead to three bonding possibilities, namely spontaneous bonding without voids, spontaneous bonding with voids, and bonding with gap under external pressure or un-bondable. The application of the spontaneous bonding process to patterned wafers was also conducted successfully, which shows that the technology will have potential applications in wafer-scale integration and packaging where high temperature and high pressure environment is prohibited.