DocumentCode :
323260
Title :
A high-speed and high-precision Winner-Select-Output (WSO) ASIC
Author :
Yu, Haiming ; Miyaaoka, R.S. ; Lewellen, Tom K.
Author_Institution :
Med. Center, Washington Univ., Seattle, WA, USA
fYear :
1997
fDate :
9-15 Nov 1997
Firstpage :
656
Abstract :
The design and performance characteristics of a 16-channel Winner-Select-Output (WSO) ASIC are presented. The WSO ASIC does a fast comparison of 16 analog input voltages, outputs the maximum signal, the “second” maximum (partner) signal, and their addresses. The WSO ASIC chip is a key component of an analog electronics system being developed for a depth of interaction (DOI) PET detector module. The basic cell of WSO ASIC is a “winner take all” (WTA) circuit. The precision of the WSO ASIC is enhanced by using a cascade structure WTA cell. The chip requires a single +5 V supply and consumes 35 mW of power. The WSO ASIC is sensitive to voltage differences as small as 10 mV. The propagation delay of the chip is less than 30 nsec for voltage differences of >50 mV (typical for proposed application)
Keywords :
analogue integrated circuits; application specific integrated circuits; nuclear electronics; positron emission tomography; scintillation counters; analog electronics system; analog input voltages; cascade structure; depth of interaction PET detector module; high-speed and high-precision winner-select-output ASIC; propagation delay; voltage differences; winner take all; Application specific integrated circuits; CMOS technology; Decoding; Detectors; Face detection; Mirrors; Photonic crystals; Positron emission tomography; Propagation delay; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium, 1997. IEEE
Conference_Location :
Albuquerque, NM
ISSN :
1082-3654
Print_ISBN :
0-7803-4258-5
Type :
conf
DOI :
10.1109/NSSMIC.1997.672667
Filename :
672667
Link To Document :
بازگشت