Safe operating area of power DMOS FETs

The physical origin of the safe-operating-area (SOA) limitation in power DMOSFETs lies in the parasitic bipolar junction transistor (BJT) which is inherent to these devices. Direct-current SOA depends on transconductance and thermal variations of the drain-to-source current, while short-circuit SOA is strongly dependent on transconductance and the transient thermal impedance of the packaged device. It is shown that the power DMOSFET is inherently thermally stable. However, for operation at high voltages and low currents (DC-SOA), the built-in parasitic BJT could turn on locally due to solder voids, local high thermal impedance, and/or BJT cells with higher gain. Turn-on of the built-in BJT will cause device failure, limiting DC-SOA. DC-SOA can be improved with a lower temperature coefficient for drain current, which implies lower transconductance and thus improves SC-SOA due to lower power dissipation