DocumentCode
3233190
Title
Simulation of NOR-Flash Memory Cells Focusing on Narrow Channel Effects on VTH Dispersion
Author
Kondo, Masaki ; Nakauchi, Takahiro ; lto, S. ; Aoki, Nobutoshi ; Nakamura, Mitsutoshi ; Naruke, Kiyomi ; Ishiuchi, Hidemi
Author_Institution
Center for Semicond. Res. & Dev., Toshiba Corp., Yokohama
fYear
2006
fDate
6-8 Sept. 2006
Firstpage
127
Lastpage
130
Abstract
In this paper, we present novel simulation results including threshold voltage (VTH) dispersions caused by process variations for highly scaled NOR-flash memories. Fully 3-D process and device simulations are applied to calculate both of a cell (or drain) current and an F-N current with a realistic device shape. Owing to the narrow channel effects, not only the cell current but also the F-N current is found to be sensitive to the shapes of an active area and a floating gate. The dependence of the currents on the device shape is strongly related to the degradation of the VTH dispersion and hence makes it difficult to miniaturize the memory cell. In addition, we propose a suitable cell structure in order to control the VTH dispersion
Keywords
flash memories; logic gates; voltage control; 3-D device simulation; 3-D process simulation; NOR-flash memory cells; VTH dispersion control; floating gate; narrow channel effects; Current-voltage characteristics; Degradation; Dispersion; Electrons; Fluctuations; Nonvolatile memory; Read-write memory; Shape; Threshold voltage; Tunneling; 3D simulation; F-N tunneling current; flash memory; narrow channel effect; threshold voltage dispersion;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 2006 International Conference on
Conference_Location
Monterey, CA
Print_ISBN
1-4244-0404-5
Type
conf
DOI
10.1109/SISPAD.2006.282854
Filename
4061597
Link To Document