DocumentCode
3233461
Title
LOCOS process-induced stress effect on CMOS SOI characteristics
Author
Huang, Cheng-Liang ; Soleimani, Hamid ; Grula, Greg ; Arora, Narain ; Sleight, Jeff ; Antoniadis, Dimitri
Author_Institution
Digital Equipment Corp., Hudson, MA, USA
fYear
1996
fDate
30 Sep-3 Oct 1996
Firstpage
82
Lastpage
83
Abstract
Process-induced stress effects on LOCOS SOI devices are reported. We show that as the field oxide thickness increases, degradation (enhancement) of NMOS (PMOS) I-V characteristics becomes increasingly pronounced. In addition, the linear relationship of transconductance vs. device width, typically seen in the bulk devices, becomes nonlinear. We attribute both phenomena to the LOCOS-induced stress effects on the SOI film
Keywords
CMOS integrated circuits; characteristics measurement; integrated circuit measurement; internal stresses; isolation technology; silicon-on-insulator; CMOS SOI characteristics; I-V characteristics; LOCOS process-induced stress effect; device width; field oxide thickness; transconductance; CMOS process; CMOS technology; Compressive stress; Degradation; MOS devices; Semiconductor films; Silicon; Temperature; Tensile stress; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 1996. Proceedings., 1996 IEEE International
Conference_Location
Sanibel Island, FL
ISSN
1078-621X
Print_ISBN
0-7803-3315-2
Type
conf
DOI
10.1109/SOI.1996.552504
Filename
552504
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